For fabrication of integrated circuits, layers provided with different electrical properties are usually applied on semiconductor wafers and each patterned lithographically. A lithographic patterning step may include applying a photosensitive resist, exposing the photosensitive resist with a desired structure for the relevant layer and developing it, and then transferring the resist mask thus produced into the underlying layer in an etching step.
The exposure of the photosensitive resist is carried out, for example, in a wafer stepper or wafer scanner in a lithographic projection step. Before the beginning of the respective exposures, alignment or orientation sequences, which use alignment marks are provided. The alignment marks are typically arranged in the edge regions of a mask that provides the relevant structure.
During exposure, the alignment marks are transferred into a sawing kerf that separates the individual exposure fields on the semiconductor wafer. The alignment marks enable the positional determination of the structures formed on the semiconductor wafer or, by determining the position of the alignment marks, it is possible to deduce the precise positioning and orientation of the structure for the integrated circuit.
The orientation or alignment of the semiconductor wafer in the exposure tool with respect to the projection optical arrangement is carried out by comparing the alignment marks with reference marks. Such reference marks are often inserted via the lens system of the projection optical arrangement relative to a detector.
The way in which the alignment method is carried out on an individual basis depends to the device manufacturers. An offset of the actual position of the alignment marks relative to the ideal position of the reference mark is established based on the mark comparison. The semiconductor wafer, generally deposited on a substrate holder, can consequently be corrected in terms of its position, so that the subsequent exposure can be performed with high positional accuracy.
Various alignment marks are known in the art, each designed for specific purposes. FIG. 6 shows an alignment mark for the coarse alignment of the semiconductor wafer. The alignment mark is formed as a cross. Two alignment marks for coarse alignment are usually arranged in the region of the sawing kerf. The alignment mark according to FIG. 6 approximately occupies an area having a width of 100 μm and a length of 100 μm.
The coordinates of the alignment marks for coarse alignment in the sawing kerf are normally stored in the exposure tool. For coarse alignment, the substrate holder is moved to the stored positions. The orientation of the semiconductor wafer during coarse alignment is usually carried out based on a detection of scattered light from a light source, which arises through reflection at the alignment marks. The scattered light may, for example, be recorded by an optical microscope and be imaged onto a CCD camera. During the orientation of the semiconductor wafer, the image of the CCD camera is analyzed, and structures corresponding to the alignment marks for coarse alignment are sought by a pattern recognition method.
A further type of alignment mark is used for fine alignment. In the case of most manufacturers of exposure tools, the alignment marks are embodied as arrangements of elongate, parallel bars that usually have a structure width of a few micrometers. One example of an alignment mark for fine alignment is shown in FIG. 7. The alignment mark according to FIG. 7 approximately occupies an area having a width of 120 μm and a length of 50 μm. Two of the alignment marks arranged perpendicular to one another are necessary for fine alignment in the horizontal direction and in the vertical direction.
The alignment marks shown in FIGS. 6 and 7 correspond to the design rules of a manufacturer of exposure tools, in this case, from the company Canon.
The alignment marks for fine alignment are usually arranged at a predetermined distance from the alignment marks for coarse alignment, which, as a result, also serve for finding the alignment marks for fine alignment. The substrate holder is displaced to the known position of the alignment mark for fine alignment. During fine alignment, the orientation of the semiconductor wafer is likewise carried out on the basis of a detection of scattered light from a light source, which arises through reflection at the alignment marks. In contrast to the case discussed above, pattern recognition is not normally carried out, rather the intensity profile of the scattered light is measured, from which it is possible to deduce the position of the alignment mark for fine alignment.
Because alignment marks for coarse alignment and the alignment marks for fine alignment are fit at different positions in the sawing kerf region of the exposure field of the integrated circuit the time requirement expended for the movement of the substrate holder is increased, and accordingly, the production throughput in the fabrication of integrated circuits is reduced. Further, the alignment marks for coarse alignment and for fine alignment occupy a large area in the region of the sawing kerf.